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nnp:mosfet_in_2d [2020/08/03 01:32]
daryoush.nosraty-alamdary [Appendix: MOSFET]
nnp:mosfet_in_2d [2020/08/03 14:41]
daryoush.nosraty-alamdary [Appendix: MOSFET]
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 The calculated mobility from the simulation is once again $933 \ \rm cm^2/Vs$ in the substrate, however it is $576  \ \rm cm^2/Vs$ at $y=0$ coordinate. The calculated mobility from the simulation is once again $933 \ \rm cm^2/Vs$ in the substrate, however it is $576  \ \rm cm^2/Vs$ at $y=0$ coordinate.
 ===== Appendix: MOSFET ===== ===== Appendix: MOSFET =====
-In the last section we found out, from the comparison of the input characteristics at high drain-source voltage $V_{\rm DS} = 2 \ \rm V$, that the MOSFET device with a gate length of smaller than $L \leq 400 \ \rm nm$, would suffer from the punch-through effect. However, if we further shorten our gate length below $100 \ \rm nm$, the situation would even be worse. Namely the leakage current would be so high, that even at very low source-drain voltages $V_{\rm DS} = 0.2 \ \rm V$, the MOSFET would conduct, even at gate-voltages below the threshold voltage $V_{\rm GS} < V_{\rm Th}$, and therefore the switching capability of the MOSFET would be diminished and eliminated. Figure illustrates this phenomenon:​ +In the last section we found out, from the comparison of the input characteristics at high drain-source voltage $V_{\rm DS} = 2 \ \rm V$, that the MOSFET device with a gate length of smaller than $L \leq 400 \ \rm nm$, would suffer from the punch-through effect. However, if we further shorten our gate length below $100 \ \rm nm$, the situation would even be worse. Namely the leakage current would be so high, that even at very low source-drain voltages $V_{\rm DS} = 0.2 \ \rm V$, the MOSFET would conduct, even at gate-voltages below the threshold voltage $V_{\rm GS} < V_{\rm Th}$, and therefore the switching capability of the MOSFET would be diminished and eliminated. Figure ​{{ref>​fig32}} ​illustrates this phenomenon:​ 
-<​figure ​fig7>+<​figure ​fig32>
 {{ :​nnp:​mosfet_extreme-short-channel-leakage_input-char.png?​550 |}} {{ :​nnp:​mosfet_extreme-short-channel-leakage_input-char.png?​550 |}}
 <​caption>​ ** The comparison of input characteristics of the N-Ch MOSFET calculated quantum mechanically with the Masetti mobility, showing the leakage current in the input characteristics. ** <​caption>​ ** The comparison of input characteristics of the N-Ch MOSFET calculated quantum mechanically with the Masetti mobility, showing the leakage current in the input characteristics. **
 </​caption>​ </​caption>​
 </​figure>​ </​figure>​
-As the above input characteristics cures show, for gate-length below $100 \ \rm nm$ there is basically no valid switching function possible, as the drift current has already started at $V_{\rm GS} = 0 \ \rm V$ for $L_G = 75 \ \rm nm$. This is basically to say that, at higher drain-source voltages the leakage curremt is actually more dominant to the channel inversion layer current, which can be switched on and off. It is also worth noting that the leakage current takes place inside the bulk of the MOSFET at the bottom of source drain doped region as figure shows:  +As the above input characteristics cures show, for gate-length below $100 \ \rm nm$ there is basically no valid switching function possible, as the drift current has already started at $V_{\rm GS} = 0 \ \rm V$ for $L_G = 75 \ \rm nm$. This is basically to say that, at higher drain-source voltages the leakage curremt is actually more dominant to the channel inversion layer current, which can be switched on and off. It is also worth noting that the leakage current takes place inside the bulk of the MOSFET at the bottom of source drain doped region as figure ​{{ref>​fig33}} ​shows:  
-<​figure ​fig7>+<​figure ​fig33>
 {{ :​nnp:​mosfet-lg75nm-leakage.png?​600 |}} {{ :​nnp:​mosfet-lg75nm-leakage.png?​600 |}}
 <​caption>​ ** The norm of the leakage current in $L_G = 75 \ \rm nm$ MOSFET, at zero gate-voltage $V_{GS}=0$, flowing within the bulk. ** <​caption>​ ** The norm of the leakage current in $L_G = 75 \ \rm nm$ MOSFET, at zero gate-voltage $V_{GS}=0$, flowing within the bulk. **
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 </​code>​ </​code>​
-But to be able to see the quantum mechanical effects, lets us first take a look at the classical energy resolved densities in the channel and the source-drain doping regions (for that the //​only_quantum_regions//​ flag has to be set to //no// in the //​energy_resolved_density//​ group). The classical energy resolved densities are shown in figure {{ref>fig7}}:+But to be able to see the quantum mechanical effects, lets us first take a look at the classical energy resolved densities in the channel and the source-drain doping regions (for that the //​only_quantum_regions//​ flag has to be set to //no// in the //​energy_resolved_density//​ group). The classical energy resolved densities are shown in figure {{ref>fig34}}:
  
-<​figure ​fig7+<​figure ​fig34
-{{ :nnp:modelocking.gif?550 |}} +{{ :nnp:mosfet_class_erd.png?550 |}}<​caption>​ ** The classical energy resolved density in the $L_{\rm G} = 25 \ \rm nm$ MOSFET ​at three different energy levels. ** 
-<​caption>​ ** The input characteristics of the N-Ch MOSFET ​calculated classically with the Masetti mobilityboth in normal ​and logarithmic scaleswithout ​the effect of the shift of the ohmic drain contact. **+</​caption>​ 
 +</​figure>​ 
 +Now let us look at the same energy resolved densities in the MOSFET source and drain regionobtained using the quantum mechanics alone: 
 +<figure fig35> 
 +{{ :​nnp:​mosfet_qm_erd_qm-confinement.png?​580 |}} 
 +<​caption>​ ** The quantum mechanical energy resolved density ​in the MOSFET source ​and drain regionsshowing spacial quantum confinement at discrete energy levels. ** 
 +</​caption>​ 
 +</​figure>​ 
 +In the above figure we can clearly see that compared to the classical density, ​the quantum mechanical density indicate quantum confinement in the source ​drain doping regions. Furthermore,​ as we shall see in figure {{ref>​fig36}},​ also the density in the inversion layer shows quantum confinement for different discrete energy levels: 
 +<figure fig36> 
 +{{ :​nnp:​mosfet-lg25nm_qm-confinement-in-channel_2d.png?​550 |}} 
 +<​caption>​ ** The quantum mechanical energy resolved density in the inversion layer of the MOSFET-channel,​ at two different energy levels, showing the standing wave pattern, which indicates quantum confinement. **
 </​caption>​ </​caption>​
 </​figure>​ </​figure>​
- 
- 
  
 In the above input characteristics curve, however, the drift and diffusion parts are hard to distinguish from each other without the logarithmic scale. In the above input characteristics curve, however, the drift and diffusion parts are hard to distinguish from each other without the logarithmic scale.